Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications

25th May 2006

LEON processor in focus at DASIA 2006 conference in Berlin

The international space system engineering conference DASIA 2006 (DAta Systems In Aerospace) was held this year in May in Berlin, Germany. At the conference, the LEON processor was presented in more than ten presentation.

A complete panel session was dedicated to the LEON processor, during which Gaisler Research presented a wide range of applications in which the LEON processor is being used, ranging from future 1000 MIPS multiprocessing systems, via dedicated microcontrollers, to radiation tolerant FPGAs.
- This conference confirms Gaisler Research's position as the leading supplier of high performance processor IP solutions to the space industry, says Per Danielsson the CEO of Gaisler Research AB.


Special LEON panel session

European Space Agency (ESA) presented the Giga INstruction Architecture (GINA) for the future ESA microprocessor based on the LEON3-FT IP core. The presentation covered the complete series of the SPARC based processors used by ESA, including LEON2 and the new LEON3-FT IP core from Gaisler Research.

Gaisler Research presented the detailed implementation of the multi-core processor based on the LEON3-FT IP core. This new LEON3-FT-MP system contains four LEON3-FT processors and a set of additional IP cores such as SpaceWire, Ethernet, CAN and PCI. The presentation covered the validation of the system using a Xilinx Virtex-4 FPGA development board. The software based validation covered symmetric multi-processing (SMP) using the eCos real-time operating system and message passing through shared memory using RTEMS.

Gaisler Research presented the results from the SEU test campaign for the LEON3-FT-RTAX processor. The LEON3-FT-RTAX is implemented using a radiation-tolerant FPGA from Actel Corporation. The results show that the fault-tolerance features included in the LEON3-FT-RTAX processor are well adapted to mitigate the SEU effect encountered in the space environment and provide a fault-free processing platform for both payload and platform applications.

Gaisler Research presented the SpaceWire Remote Terminal Controller (RTC) ASIC that is developed jointly with Saab Ericsson Space, Sweden. The SpaceWire-RTC ASIC is based on the GRLIB IP core library and the LEON2-FT VHDL model. The ASIC features SpaceWire and CAN bus interfaces, and will be manufactured on a 0,18 um radiation hardened technology.

Other presentations

Alcatel Alenia Space, Italy, presented their OMNIA ASIC development. The OMNIA ASIC is a SoC design based on LEON2-FT which has been enhanced with the GRFPU-FT High-Performance Floating-Point Unit developed by Gaisler Research.

Saab Ericsson Space, Sweden, presented their COLE ASIC development. The COLE ASIC is also a SoC design based on LEON2-FT. It includes the GRFPU-FT High-Performance Floating-Point Unit and the Memory Management Unit (MMU), both developed by Gaisler Research.

Swedish Space Corporation, Sweden, presented the on-board data handling system for the PRISMA rendezvous and formation flying mission. The system controller is based on the LEON3-FT fault tolerant processor implemented in an Actel FPGA.

Atmel Corporation, France, presented the development timeline for the AT697 processor which is based on the LEON2-FT processor core.

Verhaert Space, Belgium, presented their Advanced Data and Power Management System (ADPMS) which is based on the AT697 LEON2-FT processor. ADPMS is planned for in-orbit demonstration next year on ESA's PROBA-II technology demonstration satellite mission. In addition to performing the initial system studies and trade-offs, Gaisler Research has developed the telemetry and telecommand FPGA used in ADPMS.

IDA Technical University Braunschweig, Germany, presented the Venus Express Monitoring Camera (VMC) which uses the LEON2 processor core. The camera control
is implemented in an FPGA and integrates in, addition to the processor, peripheral control logic and interfaces to various sensors and communication units.

VEGA IT GmbH, Germany, presented their Generic Emulator Test System (GETS) project, in which the TSIM instruction simulator from Gaisler Research has been
used.

About Gaisler Research AB

Gaisler Research AB is a provider of SoC solutions for exceptionally competitive markets such as aerospace, military and demanding commercial applications. The Gaisler Research's products consist of user-customizable 32-bit SPARC V8 processor cores, peripheral IP-cores and associated software and development tools. Gaisler Research solutions help companies develop highly competitive application and customer-specific SoC solutions.

References

The conference is organised by EUROSPACE, an association of the European space industry, in co-operation with the European Space Agency (ESA), among others.

DASIA 2006 (DAta Systems In Aerospace) - Programme, SP-630 Abstracts