Aeroflex Incorporated announces the purchase of Gaisler Research AB
Colorado Springs, Colorado, July 14, 2008 — Aeroflex Incorporated today announced the acquisition of Gaisler Research AB, a privately held company, located in Gothenburg, Sweden.
Gaisler Research AB announced new licensing agreements with Ceton Corporation (US) and Cheertek (Taiwan). They have selected the LEON3 processor and the GRLIB IP-library for their new multimedia products. These companies now join the rapidly growing base of customers that use the LEON processor. Today, more than 70 companies worldwide rely upon LEON processing solutions to reduce the design cost of next-generation chip development.
Synplicity Inc., Sunnyvale, has launched its the ReadyIP Program at the Embedded Systems Conference, San Jose, CA. The ReadyIP Initiative, is a program that takes aim at simplifying the access, evaluation, and use of intellectual property (IP) for FPGA-based system design. Gaisler Research is one of the first companies that are part of the initiative and has made available their LEON3 SPARC processor and peripherals source code for immediate download. Gaisler Research also provides tailored IP cores for Synplicity's High-performance ASIC Prototyping System (HAPS).
Gaisler Research joins eASIC’s growing eZ-IP Alliance Program to provide higher performance LEON3 SPARC soft processor using Nextreme zero mask-charge ASICs.
eASIC Corporation, Santa Clara, a provider of zero-mask charge ASIC devices, today announced the immediate availability of Gaisler Research’s LEON3 SPARC Soft Processor. eASIC and Gaisler Research migrated the LEON3 processor to eASIC’s Nextreme family of zero mask-charge ASIC devices and achieved 235MHz performance, shattering the performance achievable using high performance FPGAs. Customers now have immediate access to the LEON3 processor and GRLIB IP library for implementing single chip, SPARC V8 architecture compliant, embedded systems using Nextreme devices.
Gaisler Research AB, the leader in System on Chip (SoC) design, today announced that Mentor Graphics Nucleus® Operating System (OS) is now supported on the LEON3 processor. This off-the-shelf solution improves the design productivity and reduces the design cost of next generation embedded systems. A port, a board support package and a demonstration application are now available for the GNU based SW development environment.
Gaisler Research AB announced that it has designed several FPGAs for scientific experiments and instrument, all based on Actel RT54SX32 and RT54SX72S devices. The latest designs were launch on-board the Atlantis STS-122 shuttle mission and installed on the European Columbus laboratory that is part of the International Space Station (ISS).
Gaisler Research AB announced it has partnered with Synplicity Inc., Sunnyvale, USA, a leading supplier of innovative IC design and verification solutions.
The GRLIB IP core library from Gaisler Research is ideally suited for SoC designs and implements plug and play capabilities that minimize the engineering effort during the design phase. It includes the widely popular LEON3 user-customizable 32-bit SPARC V8 processor.
The partnership will ensure that users of the Synplicity's High-performance ASIC Prototyping System (HAPS), a high performance and high capacity FPGA based system for ASIC and ASSP prototyping, can readily download and synthesize a large set of very advanced and mature IP cores from the GRLIB library.
Gaisler Research AB announced new licensing agreements with leading companies such as Synplicity Hardware Platforms Group (Sweden), and Magima Technologies (China). They have selected the LEON3 processor and the GRLIB IP-library for their System on Chip (SoC) designs. These companies now join the rapidly growing base of customers that use the LEON processor. Today, more than 60 companies worldwide rely upon LEON processing solutions to reduce the design cost of next-generation chip development.