Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications

CAN controllers

Aeroflex Gaisler provides IP core solutions for the CAN 2.0B bus protocol. Three different CAN cores are available:

CAN_OC

The CAN_OC core is a Philips SJA1000 compatible CAN core with a AHB slave backend. 

Features: 

  • 20-1000 kbps bitrate
  • CAN 2.0B with standard and extended frame format
  • Message filtering
  • 64 byte receive FIFO
  • Optional single shot transmission (i.e. no retransmission on arbitration loss)

See the GRLIB IP core user's manual for more information.

GRCAN

GRCAN block diagram

(GRCAN block diagram)

The GRCAN core is a CAN controller with an AHB DMA backend. The APB bus is used for configuration, control and status handling and the AHB bus is used for retrieving and storing CAN messages in memory external to the CAN controller.  GRCAN supports transmission and reception of sets of messages by use of circular buffers located in memory external to the core. Separate transmit and receive buffers are assumed. Reception and transmission of sets of messages can be ongoing simultaneously.

Features:

  • 20-1000 kbps bitrate
  • CAN 2.0B with standard and extended frame format
  • Message filtering
  • DMA using circular buffers of configurable size
  • Single shot transmission 

See the GRLIB IP core user's manual for more information.

GRHCAN 

GRHCAN has the same backend as GRCAN but uses the ESA HurriCANe frontend and is only available for use within ESA projects.

Device drivers

Device drivers for RTEMS and VxWorks are available for all CAN cores.