Cobham Gaisler AB provides IP cores and supporting development tools for embedded processors based on the SPARC architecture. We specialize in digital hardware design for both commercial and aerospace applications

I²CMST

i2cmst-blockThe I²C-master core is a modified version of the OpenCores I²C-Master where the WISHBONE interface has been replaced with an AMBA APB interface. The core is compatible with Philips I²C standard and supports 7- and 10-bit addressing. Standard-mode (100 kb/s) and Fast-mode (400 kb/s) operation are supported directly.

Features

  • AMBA APB interface
  • Supports 7- and 10-bit addressing
  • Bus arbitration (multi master operation)
  • Software programmable clock frequency
  • Clock stretching

For more information, please see the GRLIB IP Core User's Manual

Area

  • The I²CMST core uses approximately 200 LUTs on Xilinx Virtex 2 technology.

Drivers

  • Aeroflex Gaisler provides initialization code and drivers for RTEMS, Linux 2.6 and VxWorks.

Availability

  • The interface is available under a commercial license and also under the GPL.