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Aeroflex Gaisler provides the LEON processor, a 32-bit synthesisable processor core based on the SPARC V8 architecture. The core is highly configurable, and particularly suitable for system-on-a-chip (SOC) designs. Several versions of the LEON processor have been developed.
The LEON2 processor was designed under contract from the European Space Agency, and is now available as a radiation-hardened components from Atmel (AT697 and AT7913).
The LEON3 core is a re-implementation of the SPARC V8 arcitecture, with a deeper 7-stage pipeline and multi-processor support. It is distributed as part of the GRLIB IP library. A fault-tolerant verion of LEON3 is also available, suitable for implementation on both ASIC technologies and radiation-tolerant FPGAs from Actel and Xilinx.
The new LEON4 core is an evolution from the LEON3 core with improved performance thanks to wider internal buses, modified pipeline and support for a Level-2 cache. A LEON4 evaluation board with a dual-core processor system is available.
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Processor IP cores
LEON3FT based products
SPARC documentation
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LEON3FT IHP 0.20 um
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| Copyright 2013 Aeroflex Gaisler AB. |
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