The GR716B is a radiation-hardened microcontroller featuring the fault-tolerant LEON3 SPARC V8 processor. Based on the GR716A design, the GR716B has been developed to provide higher computational performance and excellent communication interfaces.

This page describes a running development and no guarantees can be given concerning future product availability. All information on this page is subject to change without notice. Please click this link to sign up to receive notifications about product and documentation updates.

Specification

- System frequency up-to 100 MHz

- SpaceWire links up-to 100 Mbps

- CQFP132 hermetically sealed ceramic package or (TBC) PBGA-400 plastic
  package

- Total Ionizing Dose (TID) up to 100 krad (Si) (TBC)

- Single-Event Latch-up Immunity (SEL) to LETTH > 118 MeV-cm2mg (TBC)

- Single-Event Upset (SEU) < 1E-5 event/device/day (TBC) in space environment

Quick Links

- Evaluation boards

- Documentation & Resources

Architecture

The GR716B is based on a LEON3FT processor and two real-time accelerators (RTA). It embeds 192 KiB of on-chip RAM memory and it also provides fault tolerant memory controllers to provide access to off-chip memories.

The list of I/O interfaces includes SpaceWire router, Ethernet, MIL-STD-1553B, CAN, PacketWire, programmable PWM interface, SPI with SPI-for-Space protocols, UART, I2C, GPIO.

The analog functions include radiation hardened cores such as DAC and ADC, analog comparator, precision voltage reference,  PLL and all active parts for a crystal oscillator (XO).

From a system perspective, the GR716B offers the capability to sense core voltage for trimming of the embedded voltage regulator for low power applications. The LEON3 features single-cycle instructions execution and data fetch from the tightly coupled memories. Execution determinism is guaranteed by the deterministic instruction execution time and fixed interrupt latency. 

Applications: FPGA Supervisor

The GR716B implements GRSCRUB, an FPGA configuration supervisor responsible for programming and scrubbing the FPGA configuration memory to prevent accumulation of errors. The core is compatible with the Kintex UltraScale and Virtex-5 Xilinx FPGA families and it can be set to scrub the entire FPGA configuration memory or just a smaller area. GRSCRUB accesses the FPGA configuration memory through the SelectMap interface. The supervisor makes use of a golden FPGA configuration file that can be stored in ROM or RAM.

Real Time Accelerators

The GR716B includes two real-time accelerators (RTA),
whose function is off-loading the main LEON3 processor of
demanding real-time control tasks. Each RTA has access to
tightly coupled memories for instruction and data, thereby
allowing single-cycle access and facilitating the design of realtime application software. This also enables control of multiple real-time critical applications from one and the same RTA.

SpaceWire Router

The GR716B implements a SpaceWire router with two external ports, one internal port and time distribution support. The I/O interfaces are LVDS with extended common-mode, Cold-Spare and Fail-Safe support.

Features

• Fault-tolerant  LEON3 SPARC V8 processor
  
  • LEON-REX – extension with 16-bit instructions: improved code density
  • Double precision IEEE-754 pipelined floating point unit
  • Memory protection units
  • Deterministic software execution: Multiple non-intrusive buses, fixed interrupt latency, cache-less architecture
• 2x Real Time Accelerator (RTA)
  
  • Offload the main LEON3 of demanding real-time tasks
• 192 KiB on-chip RAM (EDAC protected)
  
• External EDAC protected 8-bit PROM/SRAM memory
• SPI memory protected by EDAC and dual memory redundancy
• FPGA supervisor for programming and scrubbing Xilinx Virtex5 and Kintex UltraScale
• Programmable PWM interface with Analog/Digital Voltage control and motor control loop support
• On-chip Boot ROM for low-level initialization and optional self-testing, standby and application loading
• Support for remote boot through SpaceWire RMAP, CANOpen, SPI slave, UART
• DMA controllers with support for ‘if-else’ statements
  
• Timers with Watchdog

Interfaces

• 2-Port SpaceWire Router with time distribution support,
  • LVDS with extended common-mode,  Cold-Spare and Fail-Safe support
• 10/100 Mbit/s Ethernet
• MIL-STD-1553B interface
• CAN FD controller interface with CANopen support for remote boot
• PacketWire with CRC acceleration support
• Programmable Enhanced PWM with analog/digital voltage control loop support
• SPI with SPI-for-Space protocols
• UARTs, I2C, GPIO
  
• Mixed General purpose inputs and outputs

Integrated Analog functions

• 4x ADC: 11bit, 4 diff or 8 single channels
• 4x DAC: 12bit, 3 Msps, digital ramp generation up to 25 MS/s
• 8x DAC: 24bit ΔΣ, up to 25MHz
• 20x Fast Analogue Comparator
  
• PLL
• Crystal Oscillator, with external XTAL
  
• Precision Reference 1.9 V Output
• 1.8V and 3.3V voltage monitors
• LVDS transceivers
• Temperature sensor

 Software Development Environment (SDE)

We provide compiler toolchains and development tools with GR716B-specific support such as the GR716B BSPs, GRMON support, and simulator CPU/IO models. The Bare-metal environment is free and open-source. The GR716-MINI and GR716B-MIDI boards can be evaluated using the free GRMON3 evaluation version.

Our SDE for the GR716 consists of the following software components:

- BCC2 Bare-metal C/C++ GCC/LLVM toolchain environment

- GRMON3 hardware debugger

- TSIM3 GR716 instruction simulator

Memory support

• 192KiB EDAC protected On-Chip RAM
• Embedded ROM with bootloader for initializing and remote access
• Dedicated SPI Memory interface with boot ROM capability
• 8-bit SRAM/ROM I/F with support up to 16MiB ROM and 256MiB SRAM
• Scrubber with programmable scrub rate for all embedded memories and external PROM/SRAM and SPI memories
• Redundant boot memory (PROM/SRAM/SPI/I2C/NVRAM)
• Application software container for checking software integrity using CRC
• Boot from internal SRAM, external PROM/FLASH/SRAM/SPI/I2C memory

Draft Standard of SPI protocol(s) for space

SPI-DS-13-1-0.pdf