FPGA Scrubber Controller

GRSCRUB accesses the FPGA configuration memory through the SelectMap interface in order to program and scrub the FPGA. The GRSCRUB  also accesses via an AMBA AHB or AXI4 bus an external memory that is used to store the FPGA bitstream and all required configuration data. The FPGA scrubbing can be performed using blind or readback scrubbing. In both cases, the scrubbing can be performed targeting the entire FPGA configuration memory or just selected frames, and the execution can be one-time or periodic.

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The IP can be implemented in any ASIC or FPGA technology. For specific information related to Xilinx, Microchip, and Lattice FPGAs, please refer to our dedicated web pages:

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- Specific support for Lattice FPGAs
- Specific support for Microchip FPGAs
- Specific support for Xilinx FPGAs

Estimation of the resource utilization can be found in the download files below (Excel sheet for SoC area estimation).

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The IP core is available as a separate package or as an addition to commercial versions of the GRLIB VHDL library.

Contact sales@gaisler.com for licensing information