The software provided by us aims to be available for all our FPGA platforms, devices, and custom designs making it possible to select any OS and tool for any processor device when starting a new project. The hardware configuration selected imposes a limitation of choice.
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The software provided are mainly NOEL-V BSPs, device drivers, and compiler toolchains together with the integration into the developer tools & ecosystem. Currently, we provide NOEL-V SW packages for:
Currently, we do not provide NOEL-V specific boot-loading support.
The RISC-V target software needs a Flattened Device Tree (FDT) which describes the hardware system for the OS to find devices and adapt to other system settings. A Device Tree Binary (DTB) is normally loaded into main memory by the boot loader or the GRMON hardware debugger and a pointer to the DTB is given to the OS at boot. The DTB can be built by compiling the Device Tree Source (DTS) specific to the NOEL-V hardware design.
DTS files, describing NOEL-V template designs and FPGA bit-streams, for NOEL-V FPGA demonstration boards are found on their home page, for example, the NOEL-V Xilinx KCU105 board, and referenced from the board's Quick Start Guide.
GRLIB systems classically include AMBA Plug & Play information describing the system buses, I/O registers, interrupts, and so on. If the OS/BSP supports reading the AMBA PnP information the DTS may not be needed.
It is recommended to visit the board Quick Start Guide or OS documentation to find specific constraints on the DTB target memory location that may exist.
NOEL-V is supported through the generic RISC-V ISA support and tested using the compilers listed below and provided pre-built for NOEL-V within the prepared SW components:
We provide the GRMON hardware debugger solution for NOEL-V. It can be used to perform board bring-up, application uploading and execution, RISC-V assembly debugging and C/C++ debugging via GDB or Eclipse CDT IDE without any additional hardware adapter required. The Evaluation version is compatible with the prebuilt FPGA bitstreams provided here and for custom GRLIB designs built on the GPL release for free. For commercial GRLIB designs a Professional license for GRMON is required.
For a detailed overview of a specific device and environment please consult the SW product's manual and the software overview in the board Quick Start Guide. This section does not cover custom GRLIB SoC designs.
VxWorks 7 SR0650 with LLVM/Clang toochain provided by us under commercial license.
Gaisler Buildroot for building Linux kernel and OpenSBI. Prebuilt toolchains. Example images.
RTOS NOEL-V BSP available on request. Contact us!
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