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Operating Systems

Operating systems for the LEON SPARC and NOEL RISC-V processors

Operating systems for the LEON SPARC and NOEL RISC-V processors

Software solutions designed to ensure optimal functionality for a wide range of applications

Application areas

Our technology

Efficiency

Optimized for the LEON and NOEL processors, ensuring efficient and robust operation.

Extensive Device Support

Wide range of device drivers to support various peripherals and hardware interfaces.

Cross-Platform Toolchains

Support for GNU/LLVM C/C++ compilers and binutils across different operating systems.

Real-Time Capabilities

Options for real-time kernels like RTEMS and VxWorks, ensuring precise timing and reliability.

Open Source Options

Several open-source solutions, providing flexibility and community support.

Integration with GRLIB

All operating systems are designed to work with SoCs based on the GRLIB IP library, facilitating rapid development and integration.

Comprehensive Documentation

Detailed guides and resources to aid development and integration.

Multi-Host Compatibility

Support for development on both Windows and Linux hosts.

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Memory controllers

DDR2/DDR3 SDRAM, 32-bit PC133 SDRAM, SRAM, QSPI, NAND flash, parallel PROM

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Interfaces

SpaceWire interface and router, SpaceFibre and WizardLink controller, 32-bit PCI bridge, CCSDS/ECSS Data Handling, 10/100/1000 Mbit Ethernet MAC, USB 2.0 host and device controllers, SelectMap FPGA Supervisor, CAN FD, MIL-STD-1553B, SPI, I2C, UART

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Security

SHA 256, AES 256

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Miscellaneous

AHB and APB controllers, AHB to AHB bridge, AHB to AXI bridge, L2 Cache, FPUs

FPGA and ASIC IP Cores

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Template Designs

To allow users to quickly get started with their development, GRLIB contains template designs for common commercial FPGA evaluation boards. Template designs for SoC development contain commonly used IP cores such as processors, memory controllers and communication interfaces tailored for specific development boards and with targeted constraints. They provide a reliable starting point for customization and optimization, enabling designers to concentrate on the unique aspects of their SoC design.A list of the supported FPGA evaluation boards is available in the GRLIB IP Library User's Manual.We also provide evaluation bitstreams for our processors. See LEON examples and NOEL-V examples

Debugging

The GRMON3 hardware debugger enables developers to efficiently diagnose and resolve issues. With drivers that simplify the control of processors and peripherals, GRMON3 provides a powerful tool for troubleshooting complex systems. The debugger has the ability to connect to the SoC through various types of communication interfaces for monitoring and testing purposes. This allows developers to debug their systems at all stages of the design process, from the early stages of hardware bring-up to the final stages of software development.

Support

The GRLIB community is a discussion platform that can be used by open-source users of the library to seek help, share information, discuss, and collaborate. See https://grlib.community GRLIB commercial users can benefit from an optional support agreement that provides them with direct communication with the development team.

Licensing

The GRLIB IP Library is available in both open-source and commercial versions. The open source IP cores are distributed under the GNU GPLv2 license, making it ideal for academic purposes, evaluation, and prototyping. However, the GPLv2 license poses restrictions on commercial products, so GRLIB presents a commercial licensing option for those who require proprietary designs. The commercial distributions provide access to additional IPs and target technologies not included in the open-source version. The GRLIB IP Core User's Manual provides a complete list of all IP cores, along with information about which GRLIB distribution(s) includes each IP core. We also have a collection of FAQs on the licensing topic.

Operating Systems

Compare our Rad Hard Microcontrollers

DEVICE

GR716A

GR716B

Max Frequency

50 MHz

100 MHz

On-Chip RAM

192 KiB

192 KiB

Support for single 3.3V supply

Yes

TBD

Processor

LEON3FT

LEON3FT

Real-Time Accelerator (RTA)

No

Yes, 2x

Off-chip Memory

PROM/SRAM/SPI/I2C with EDAC

PROM/SRAM/SPI with EDAC

SpaceWire

2x Endpoints

Router (2x external, 1x internal ports)

MIL-STD-1553

Yes

Yes

CAN

2x CAN 2.0 controllers

1x CAN-FD controller

PacketWire with CRC

Yes

Yes

I2C

Yes

Yes

FPGA supervisor

No

Yes

Ethernet

No

10/100 Mbit/s

ADC

2x 11bits resolution @ 200ksps8 differential/16 single-ended channels

4x ADC 11bits/14bits @ 500Ksps8 differential/16 single-ended channels

DAC

12bit @ 3Msps, 4 channels

12bit @ 3Msps analog DAC, 4 channels

Fast analogue comparators

No

20x

PWM-DAC

No

Yes, 8x

Availability

Flight models available

Prototypes in 2024

Compare our Rad hard microprocessors

Product

GR765

GR740

GR712RC

Status

In development

TRL 9

TRL 9

Number of Cores

8

4

2

Operating frequency

1 GHz

250 MHz

100 MHz

DMIPS/Core, total

3.25k,26k

425, 1700

140, 280

Total Ionizing Dose krad (Si)

TBD

300 

300

SEL Immunity (MeV-cm^2/mg)

TBD

> 125

> 118 

Package

Plastic

Ceramic or plastic

Ceramic

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