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GR716B
Status:
Development
The GR716B is a radiation-hardened microcontroller featuring the fault-tolerant LEON3FT SPARC V8 processor and two Real-Time Accelerators.
Overview
This page describes a running development and no guarantees can be given concerning future product availability. All information on this page is subject to change without notice. Please click this link to sign up to receive notifications about product and documentation updates.
The GR716B is a radiation-hardened microcontroller featuring the fault-tolerant LEON3 SPARC V8 processor. Based on the GR716A design, the GR716B has been developed to provide higher computational performance and excellent communication interfaces.
The GR716B is based on a LEON3FT processor and two real-time accelerators (RTA). It embeds 192 KiB of on-chip RAM memory and it also provides fault tolerant memory controllers to provide access to off-chip memories.
The list of I/O interfaces includes SpaceWire router, Ethernet, MIL-STD-1553B, CAN, PacketWire, programmable PWM interface, SPI with SPI-for-Space protocols, UART, I2C, GPIO.
The analog functions include radiation hardened cores such as DAC and ADC, analog comparators, precision voltage reference, PLL and all active parts for a crystal oscillator (XO).
From a system perspective, the GR716B offers the capability to sense core voltage for trimming of the embedded voltage regulator for low power applications. The LEON3 features single-cycle instructions execution and data fetch from the tightly coupled memories. Execution determinism is guaranteed by the deterministic instruction execution time and fixed interrupt latency.
Architecture
Key Tech Spec
Target technology support
Evaluation boards
Ordering information
Development Kit
Licensing
Software
Tools
Block diagram
Supported Hardware
Configuration
Reference Design
Other resources
Detailed features
- Fault-tolerant LEON3FT SPARC V8 processor
- LEON-REX – extension with 16-bit instructions: improved code density
- Double precision IEEE-754 pipelined floating point unit
- Memory protection units
- Deterministic software execution: Multiple non-intrusive buses, fixed interrupt latency, cache-less architecture
- 2x Real Time Accelerator (RTA)
- Offload the main LEON3 of demanding real-time tasks
- 192 KiB on-chip RAM (EDAC protected)
- External EDAC protected 8-bit PROM/SRAM memory
- SPI memory protected by EDAC and dual memory redundancy
- FPGA supervisor for programming and scrubbing Xilinx Virtex5 and Kintex UltraScale
- Programmable PWM interface with Analog/Digital Voltage control and motor control loop support
- On-chip Boot ROM for low-level initialization and optional self-testing, standby and application loading
- Support for remote boot through SpaceWire RMAP, CANOpen, SPI slave, UART
- DMA controllers with support for ‘if-else’ statements
- Timers with Watchdog
Interfaces
- 2-Port SpaceWire Router with time distribution support
- LVDS with extended common-mode, Cold-Spare and Fail-Safe support
- 10/100 Mbit/s Ethernet
- MIL-STD-1553B interface
- CAN FD controller interface with CANopen support for remote boot
- PacketWire with CRC acceleration support
- Programmable enhanced PWM with analog/digital voltage control loop support
- SPI with SPI-for-Space protocols
- UARTs, I2C, GPIO
- Mixed General purpose inputs and outputs
Integrated Analog functions
- 4x ADC: 11bit resolution, 4 diff or 8 single channels
- 4xDAC : 12bit, 3 Msps, digital ramp generation up to 25 MS/s
- 8x DAC: 24bit ΔΣ, up to 25MHz
- 20x Fast Analogue Comparator
- PLL
- Crystal Oscillator, with external XTAL
- Precision Reference 1.9 V Output
- 1.8V and 3.3V voltage monitors
- LVDS transceivers
- Temperature sensor
Memory support
- 192KiB EDAC protected On-Chip RAM
- Embedded ROM with bootloader for initializing and remote access
- Dedicated SPI Memory interface with boot ROM capability
- 8-bit SRAM/ROM I/F with support up to 16MiB ROM and 32 MiB SRAM
- Scrubber with programmable scrub rate for all embedded memories and external PROM/SRAM and SPI memories
- Redundant boot memory (PROM/SRAM/SPI/NVRAM)
- Application software container for checking software integrity using CRC
- Boot from internal SRAM, external PROM/FLASH/SRAM/SPI memory
Downloads
File
Category
Revision
Date
Access
Technical specification
1
2017-11-24
Free download
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Application note
1.2
2024-08-26
Free download
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Technical note
1.1
2016-05-27
Free download
Password/
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Frequently asked questions
What is SPI for Space?
Can the FPGA Scubber core scrub Lattice FPGAs?
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