The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources.

 

Designs based on the GRLIB IP library are highly portable between target technologies and both target technology adaptions and template designs are available for Microchip FPGAs. 

• GRLIB contains template designs for several FPGA boards (the set of included template designs changes with type of GRLIB distribution). A list of supported boards is available in the GRLIB IP Library User's Manual.
• GRLIB documentation and downloads are available via the GRLIB IP Library product page.
• The LEON and NOEL processors are supported on Microchip FPGAs. Evaluation bitstreams are available as part of the GRLIB bitstreams package and through:
• LEON-RTG4 - LEON example designs for RTG4 Development Kit
• LEON-PF - LEON5 example designs for PolarFire Splash Kit
• NOEL-PF - NOEL-V example designs for PolarFire Splash Kit
• GRLIB also contains design examples for Microchip RTAX antifuse FPGAs.