GRLIB SoC Library - NanoXplore
The GRLIB IP library supports SoC designs targeting the NG-Medium, NG-Large, and NG-Ultra FPGA platforms from NanoXplore.
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SoC) development. The modular SoC designs are built from IP cores with common on-chip bus interfaces and use a coherent method for simulation and synthesis. The library is vendor-independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources. The library includes several processor models, including the fault-tolerant LEON3FT 32-bit SPARC V8 and the NOEL-V RISC-V processor models.
Contact us if you want to evaluate GRLIB on NanoXplore FPGAs |
Template designs are available for NanoXplore FPGAs. The library infrastructure provides project generation support for the NanoXplore Impulse software environment.The area of the different IPs in NG-Medium and NG-Ultra FPGAs is available in the grlib_area, a spreadsheet for SoC area estimation. |
GRLIB IP cores supported in NanoXplore FPGAs
| Processors LEON3/LEON3FT NOEL-V System peripherals TIMER, GPIO, UART On-chip RAM with FT Memory controllers (Quad) SPI Memory Controller FTMCTRL (PROM/SRAM/SDRAM & I/O) NAND Flash Controller Memory Scrubber |
Bus infrastructure
AMBA AHB Controller AMBA APB Controller AMBA AHB to AHB Bridge
MIL-STD-1553B CAN & CANFD Ethernet Parallel PCI SpaceWire I2C & SPI CCSDS TM/TC |
...And more!
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