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The FTAHBRAM implements volatile memory that is protected by means of Error Detection And Correction (EDAC). One error can be corrected and two errors can be detected, using a (32, 7) BCH code or by technology specific protection provided by the target technology block RAMs.
The on-chip memory is accessed via an AMBA AHB slave interface. The memory implements a configurable amount of accessible memory (configured via the kbytes VHDL generic). Registers are accessed via an AMBA APB interface.
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Category
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Data sheet and user's manual
2024.4
2024-12-23
Free download
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