GRLIB Xilinx
Status:
Available
Overview
The GRLIB IP library supports SoC designs targeting AMD/Xilinx FPGAs.
Evaluation bitstreams are available:
- LEON-XCKU - LEON5 example designs for Xilinx Kintex Ultrascale FPGAs
- NOEL-XCKU - NOEL-V example designs for Xilinx Kintex Ultrascale FPGAs
- NOEL-ARTYA7 - NOEL-V example designs for Xilinx 7-Series FPGAs (Digilent Arty-A7 board)
- LEON-V5QV - Information on implementation of LEON SoC designs on Virtex-5QV FPGAs
The GRSCRUB FPGA Supervisor IP core supports programming and scrubbing of Virtex-5 and Kintex Ultrascale FPGAs.
Architecture
Key Tech Spec
Target technology support
Evaluation boards
Ordering information
Development Kit
Licensing
Software
Tools
Block diagram
Supported Hardware
Configuration
Reference Design
Other resources
Detailed features
Downloads
File
Category
Revision
Date
Access
Excel sheet for SoC area estimation
Data sheet and user's manual
2024.2
2024-07-15
Free download
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Frequently asked questions
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