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DMA Controller with Crypto
Status:
Available
GRDMAC2 is a flexible direct memory access controller with AHB or AXI4 interface. It can be configured to include hardware accelerators for AES-256 and SHA-256 functionalities.
Overview
GRDMAC2 is a flexible direct memory access controller with AHB or AXI4 interface. It can be configured to include hardware accelerators for AES-256 and SHA-256 functionalities.
GRDMAC2 can perform burst transfers of data between AHB and APB peripherals at aligned or unaligned memory addresses. GRDMAC2 can be instantiated with one or two DMA interfaces to perform transfers among different AHB buses, therefore GRDMAC2 has a bridging capability.
Architecture
Key Tech Spec
Target technology support
Evaluation boards
Ordering information
Development Kit
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Software
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Block diagram
Supported Hardware
Configuration
Reference Design
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Detailed features
Downloads
File
Category
Revision
Date
Access
Data sheet and user's manual
2024.2
2024-07-15
Free download
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