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GR-VPX-GR740
Status:
Available
Development board for the GR740 quad-core 32-bit fault-tolerant LEON4FT SPARC V8 processor. Designed in 6U OpenVPX format.
Overview
The GR-VPX-GR740 development board has been designed to support the development and fast prototyping of systems based on our GR740 quad-core 32-bit fault-tolerant LEON4FT SPARC V8 processor. With the GR-VPX-GR740 Development Board, we have introduced a high-performance Single-Board Computer for use within OpenVPX and SpaceVPX environments.
Architecture
Key Tech Spec
Target technology support
Evaluation boards
Ordering information
Development Kit
Licensing
Software
Tools
Block diagram
Supported Hardware
Configuration
Reference Design
Other resources
Detailed features
GR740 quad-core 32-bit fault-tolerant LEON4FT SPARC V8 processor
On-board memory:
- SDRAM SODIMM module - 256 MiB modules provides 128 MiB of accessible data RAM plus ECC check bits.
- Parallel Boot MRAM 128 KiB & SPI Flash memory 32 MiB
- Power, reset, clock and auxiliary circuits
Interfaces at front edge of board:
- MIL-STD-1553B Interface (Transceiver/Transformer and D-sub 9)
- RJ45 10/100/1000 Mbit GMII/MII Ethernet interface (KSZ9021GN)
- 8-bit General purpose I/O (2x5 pin DIL header)
- UART/JTAG interface using FTDI Serial-USB converter (FT4232HL/USB-uAB)
- PPS (Pulse Per Second) input for synchronization (SMB)
- LED indicators for power, error, watchdog and PLL lock
- Push button switch for reset
Interfaces at back edge of board:
- Supply and system control (VPX P0)
- SM bus*
- 8 SpaceWire interfaces (VPX P1)
- 6 fully supported on-board, available from the GR740 SpW Router
- 2 routed between backplane and FMC connector*
- User Defined (UD) signals from GPIO (VPX P2)
- User Defined (UD) signals from GPIO (VPX P3)
- 1 Fat Pipe and 2 Thin Pipes for high-speed serial data interfaces (VPX P3)*
- Routed between backplane and FMC connector, functionality to be implemented in mezzanine board*
- 1 Fat Pipe and 2 Thin Pipes for high-speed serial data interfaces (VPX P5)*
- Routed between backplane and FMC connector, functionality to be implemented in mezzanine board*
On-board mezzanine interface:
- HPC-400 FMC connector2 SpaceWire interfaces connected to the GR740 router
- 2 Thin Pipes routed to P1 on the back edge (used for 2 SpaceWire interfaces)*
- 2 Fat Pipes and 4 Thin Pipes routed to P3 and P5 on the back edge*
- 1 SpaceWire interface to on-board MDM9S connector*
- SM bus*
- PCI interface (32-bit) from the GR740*
- 10-bit General purpose I/O from the GR740*
- Additional backplane clocks*
- +12V supply
*Note: These interfaces are available on the main board and interfaced with the mezzanine connector. Currently, the mezzanine board delivered along with this product do not support and do not make use of such interfaces. These interfaces are listed to provide information for the users who can build their own mezzanine boards.
Downloads
File
Category
Revision
Date
Access
Data sheet and user's manual
1.4
2020-01-30
Free download
Password/
Contact us
Data sheet and user's manual
1.0
2020-10-09
Free download
Password/
Contact us
Hardware design files
1.0
2020-10-09
Free download
Password/
Contact us
Frequently asked questions
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