GR740 Single Board Computer Reference Design
Status:
Available
Reference design files for a single board computer based on the GR740 quad-core LEON4FT microprocessor
Overview
The GR740 SBC is a reference design and basic software for a single board computer based on the rad-hard GR740 Quad-Core LEON4 SPARC V8 Processor and the Microchip RTG4 radiation tolerant FPGA. The reference design data package consists of schematics and other design files required for developing a single board computer for flight. Moreover, developers can access (under licensing conditions) a set of software products like boot software, RTEMS5-SMP OS and device drivers, test application and EGSE software.
The design package has been developed within an ESA activity that saw Gaisler and Beyond Gravity as the main actors. The board developed during the activity does not qualify for flight but a Qualification Test Plan has been established in view of a future space qualification.
Architecture
Key Tech Spec
Target technology support
Evaluation boards
Ordering information
Development Kit
Licensing
Software
Tools
Block diagram
Supported Hardware
Configuration
Reference Design
Other resources
Detailed features
Board Format
Compact PCI Serial Space backplane standard (CPCI-S.1 R1.0) with 6U form factor
- The board can be tailored to fit into both system or payload slot
Processing capabilities
- Parallel boot: MRAM 64 KiB
- Application storage: SPI Flash memory, 32 MiB
- Volatile working memory: SDRAM, 512 MiB + ECC check bits
- PCI, UART and GPIO, interfaces with the RTG4 FPGA
Microsemi RTG4 FPGA
- Adds memory interfaces and high-speed serial link (HSSL) capability to the SBC
- Volatile working memory: 3D-PLUS DDR2, 512 MiB data RAM plus ECC
- Data Storage: 3D-PLUS NAND FLASH, 8 GiB
- Implements glue-logic required to be compatible with the CPCI-S.1 R1.0 standard
- More than 70 % of the FPGA resources are available for user-defined function
Backplane interfaces
- Dual star network, 8x SpaceWire links with GR740
- Redundant CAN bus with GR740
- Full mesh network with High Speed Serial Links (SpaceFibre) with RTG4
- I2C with RTG4
- Alarms and other utility signals
Front panel interfaces
- 2x SpaceWire links
- Ethernet
- JTAG debug links
- 2x Pulse Per Second (PPS) inputs for synchronization
- GPIO
Downloads
File
Category
Revision
Date
Access
Hardware design files
2
2022-12-08
Free download
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Hardware design files
1
2022-12-08
Free download
Password/
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Technical specification
1
2022-12-08
Free download
Password/
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Hardware design files
1
2022-12-08
Free download
Password/
Contact us
Frequently asked questions
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