PC133 SDRAM

The IP can be implemented in any ASIC or FPGA technology. For specific information related to Xilinx, Microchip, and Lattice FPGAs, please refer to our dedicated web pages:

• Specific support for Lattice FPGAs
• Specific support for Microchip FPGAs
• Specific support for Xilinx FPGAs

Estimation of the resource utilization can be found here: Excel sheet for SoC area estimation

The IP can be obtained under commercial licensing conditions, enabling proprietary designs and taking advantage of a support agreement. Contact sales@gaisler.com for licensing information.

There is another version of the IP named SDCTRL. SDCTRL is identical to the FTSDCTRL except that EDAC is not supported. The SDCTRL also supports mobile SDRAM which the FTSDCTRL does not. SDCTRL is provided in full source code under the GNU GPL version of the GRLIB IP Library.