LEON-V5QV

Status:

Available

We provide prebuilt bitstreams of the Xilinx ML510 development board, considered to be a good commercial option for prototyping with the space-grade Xilinx Virtex-5QV FPGA. These bitstreams are intended for evaluation of software running on a LEON3 or LEON4 SoC.

Overview

The LEON processors and GRLIB IP library has support for the space-grade Xilinx Virtex-5QV FPGA. The Virtex-5QV support leverages the GRLIB Xilinx technology support that consists of a techmap layer that wraps specific technology elements such as memor macros and pads. GRLIB also contain template designs for a wide range of Xilinx development boards, including the Xilinx ML510 development board that is considered to be a good commercial option for prototyping V5QV designs. The GRLIB IP library infrastructure automatically builds project files for Xilinx ISE and synthesis tools such as Mentor Precision and Synopsys Synplify. More information about GRLIB and our IP cores is available on the SoC library page.

The GRLIB IP library bitfiles package prebuilt includes bitstreams for development boards such as Xilinx ML510. The bitstreams can be used together with GRMON debug monitor - including the GRMON evaluation version.

Architecture

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Key Tech Spec

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Target technology support

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Evaluation boards

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Ordering information

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Development Kit

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Licensing

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Software

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Tools

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Block diagram

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Supported Hardware

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Configuration

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Reference Design

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Other resources

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Detailed features

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Downloads

The GRLIB IP library bitfiles package prebuilt includes bitstreams for development boards such as Xilinx ML510. The bitstreams can be used together with the GRMON debug tool - including the GRMON evaluation version.

File

Category

Revision

Date

Access

FPGA bitfiles for GRLIB template designs

Example bitstream

2024.2

2024-08-06

Free download

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GRLIB IP Cores Manual

Data sheet and user's manual

2024.2

2024-07-15

Free download

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Frequently asked questions

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