Status:
Available
We provide prebuilt bitstreams of the Xilinx ML510 development board, considered to be a good commercial option for prototyping with the space-grade Xilinx Virtex-5QV FPGA. These bitstreams are intended for evaluation of software running on a LEON3 or LEON4 SoC.
The LEON processors and GRLIB IP library has support for the space-grade Xilinx Virtex-5QV FPGA. The Virtex-5QV support leverages the GRLIB Xilinx technology support that consists of a techmap layer that wraps specific technology elements such as memor macros and pads. GRLIB also contain template designs for a wide range of Xilinx development boards, including the Xilinx ML510 development board that is considered to be a good commercial option for prototyping V5QV designs. The GRLIB IP library infrastructure automatically builds project files for Xilinx ISE and synthesis tools such as Mentor Precision and Synopsys Synplify. More information about GRLIB and our IP cores is available on the SoC library page.
The GRLIB IP library bitfiles package prebuilt includes bitstreams for development boards such as Xilinx ML510. The bitstreams can be used together with GRMON debug monitor - including the GRMON evaluation version.
More information about GRLIB and our IP cores in AMD/Xilinx FPGAs is available on the dedicated page.
Being SPARC V8 conformant, compilers and kernels for SPARC V8 can be used with LEON3 and LEON4 (kernels will need a LEON BSP). To simplify software development, We provide several toolchains and operating systems. Check the software overview webpage for all the details.
The GRLIB IP library bitfiles package prebuilt includes bitstreams for development boards such as Xilinx ML510. The bitstreams can be used together with the GRMON debug tool - including the GRMON evaluation version.
File
Category
Revision
Date
Access
Example bitstream
2024.2
2024-08-06
Free download
Password/
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