Status:
Available
Prebuilt bitstreams of the Xilinx Kintex UltraScale FPGA KCU105 Evaluation Kit. These bitstreams are intended for evaluation of software running on a LEON5 SoC.
The LEON5 processor and the GRLIB IP library have support for Xilinx Kintex Ultrascale devices. We provide prebuilt bitstreams of the Xilinx Kintex UltraScale FPGA KCU105 Evaluation Kit. These bitstreams are intended for evaluation of software running on a LEON5 SoC.
The IP library support consists of a techmap layer that wraps specific technology elements such as memory macros and pads. GRLIB also contains template designs for developments boards such as the Xilinx Kintex UltraScale FPGA KCU105 Evaluation Kit and infrastructure that automatically builds project files for Xilinx Vivado and synthesis tools such as Mentor Precision Hi-Rel and Synopsys Synplify Premier. More information about GRLIB and our IP cores is available on the SoC library page.
To evaluate the example bitfiles the following items are required:
The example design range is called LEON-XCKU-EX and includes the following IP cores:
More information about GRLIB and our IP cores in Xilinx FPGAs is available on the SoC library page.
Being SPARC V8 conformant, compilers and kernels for SPARC V8 can be used with LEON processors (kernels will need a LEON BSP). To simplify software development, We provide several toolchains and operating systems. Check the software overview webpage for all the details.
The bitstreams can be used together with the GRMON debug tool - including the GRMON evaluation version.
File
Category
Revision
Date
Access
Data sheet and user's manual
1.1
2023-05-02
Free download
Password/
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Example bitstream
2024.01
2024-01-02
Free download
Password/
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