Section Processors


We provide two product lines of processors: The LEON SPARC V8 processor line and the NOEL-V RISC-V processor line.

The LEON processors are 32-bit synthesisable processor core based on the SPARC V8 architecture. The core is highly configurable, and particularly suitable for system-on-a-chip (SOC) designs. Several versions of the LEON processor have been developed. The LEON5 primarily targets high-end FPGA:s and deep-submicron ASIC technologies. For legacy and less performant technologies, the LEON3 processor is the recommended choice that will continue to be maintained.

The LEON2 processor was designed under contract from the European Space Agency, and is now available as a radiation-hardened components from Microchip (AT697 and AT7913).

The LEON3 core is a re-implementation of the SPARC V8 architecture, with a deeper 7-stage pipeline and multi-processor support. It is distributed as part of the GRLIB IP library. A fault-tolerant verion of LEON3 is also available, suitable for implementation on both ASIC technologies and radiation-tolerant FPGAs from Microchip, NanoXplore and Xilinx.

The LEON4 core is an evolution from the LEON3 core with improved performance thanks to wider internal buses, modified pipeline and support for a Level-2 cache.

The LEON5 core is the latest model in the LEON line of processors that further improves performance over previous generations though a dual-issue pipeline, improved branch prediction and a late ALU.

The NOEL-V core is our first RISC-V based processor. The NOEL-V design shared many elements with the LEON5 core and offers improved performance compared to the LEON3 and LEON4 processor models.

Processor IP cores

LEON3FT IHP 0.20 um

LEON3FT based products

LEON4FT based products

SPARC documentation