NOEL-ARTYA7

IntroductionNOEL-ARTYA7 board

The NOEL-V processor and the GRLIB IP library has support for Xilinx Artix-7 devices. This support consists of a techmap layer that wraps specific technology elements such as memory macros and pads. GRLIB also contains a template designs for developments boards such as the  Arty A7: Artix-7 FPGA Development Board (A7-100T version) and infrastructure that automatically builds project files for Xilinx Vivado and synthesis tools such as Mentor Precision Hi-Rel and Synopsys Synplify Premier. More information about GRLIB and Cobham Gaisler IP cores is available on the SoC library page.

Example designs

Cobham Gaisler provides prebuilt bitstreams of the  Arty A7: Artix-7 FPGA Development Board NOEL-V template design. These bitstreams are intended for evaluation of software running on a NOEL-V SoC. To evaluate these designs, the following items are required:

The example design range is called NOEL-ARTYA7-EX:

Software components and downloads for NOEL-ARTYA7: