USB 2.0 Device Controller

The Universal Serial Bus Device controller (GRUSBDC) provides an interface between an USB 2.0 bus and an AMBA-AHB bus. The core is used for implementing USB 2.0 functions providing access to the USB through either an AHB slave or an AHB master interface. The master interface is capable of higher bandwidths but is more complex and requires external memory. The slave interface is simpler and does not require external memory but is more bandwidth-limited. UTMI, UTMI+ and ULPI PHYs are supported.

Up to 16 IN and 16 OUT (maximum allowed by the USB 2.0 standard) endpoints can be supported and each can be individually configured for any of the four transfer types with any allowed maximum payload. There is a (technology-dependent) limit that restricts how many endpoints can use the maximum payload size but this limit is large enough not to cause any problems in practical cases. 

Some notable features are support for Remote wakeup, soft-connect and scatter-gather DMA. The core has been FPGA proven and is also being used in ASIC projects.

Fore more information please see the GRUSBDC user's manual.


Software drivers are available for Linux 2.6 conforming to the gadget API.  


Estimation of the resource utilization for the GRUSBHC can be found here:

Excel sheet for SoC area estimation


The GRUSBDC is available under a commercial license.. The IP can be implemented in any ASIC or FPGA technology. For specific information related to Xilinx, Microchip, and Lattice FPGAs, please refer to our dedicated web pages:

- Specific support for Lattice FPGAs

- Specific support for Microchip FPGAs

- Specific support for Xilinx FPGAs